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LTC1481 Ultralow Power RS485 Transceiver with Shutdown
FEATURES
s s s s s s s
DESCRIPTIO
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Low Power: ICC = 120A Max with Driver Disabled Drivers/Receivers Have 10kV ESD Protection 1A Quiescent Current in Shutdown Mode High Speed: Up to 2.5Mbits/s Data Rate ICC = 500A Max with Driver Enabled, No Load Single 5V Supply - 7V to 12V Common Mode Range Permits 7V Ground Difference Between Devices on the Data Line Thermal Shutdown Protection Power Up/Down Glitch-Free Driver Outputs Permit Live Insertion or Removal of Transceiver Driver Maintains High Impedance in Three-State or with the Power Off Up to 32 Transceivers on the Bus 30ns Typical Driver Propagation Delays with 5ns Skew Pin Compatible with the LTC485
The LTC(R)1481 is an ultralow power differential line transceiver designed for data transmission standard RS485 applications. It will also meet the requirements of RS422. The CMOS design offers significant power savings over its bipolar counterparts without sacrificing ruggedness against overload or ESD damage. Typical quiescent current is only 80A while operating and less than 1A in shutdown. The driver and receiver feature three-state outputs, with the driver outputs maintaining high impedance over the entire common mode range. Excessive power dissipation caused by bus contention or faults is prevented by a thermal shutdown circuit which forces the driver outputs into a high impedance state. The receiver has a fail-safe feature which guarantees a high output state when the inputs are left open. The LTC1481 is fully specified over the commercial and extended industrial temperature range and is available in 8-pin PDIP and SO packages.
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATIO S
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Battery-Powered RS485/RS422 Applications Low Power RS485/RS422 Transceiver Level Translator
TYPICAL APPLICATIO
RO1 RE1 DE1 DI1 D R VCC1
Supply Current vs Temperature
350 300 SUPPLY CURRENT (A) Rt 250 DRIVER ENABLED 200 150 100 50 DRIVER DISABLED THERMAL SHUTDOWN WITH DRIVER ENABLED
GND1
Rt RO2 RE2 DE2 DI2 D GND2
LTC1481 * TA01
R
VCC2
0 -50 -25
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0 25 50 75 100 125 150 175 TEMPERATURE (C)
1481 TA02
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LTC1481
ABSOLUTE
(Note 1)
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RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW RO 1 RE 2 DE 3 DI 4 N8 PACKAGE 8-LEAD PDIP D R 8 7 6 5 VCC B A GND
Supply Voltage (VCC) .............................................. 12V Control Input Voltage ..................... - 0.5V to VCC + 0.5V Driver Input Voltage ....................... - 0.5V to VCC + 0.5V Driver Output Voltage ........................................... 14V Receiver Input Voltage .......................................... 14V Receiver Output Voltage ................ - 0.5V to VCC + 0.5V Operating Temperature Range LTC1481C ....................................... 0C TA 70C LTC1481I .................................... - 40C TA 85C Storage Temperature Range ................ - 65C to 150C Lead Temperature (Soldering, 10 sec)................. 300C
ORDER PART NUMBER LTC1481CN8 LTC1481IN8 LTC1481CS8 LTC1481IS8 S8 PART MARKING 1481 1481I
S8 PACKAGE 8-LEAD PLASTIC SO
TJMAX = 125C, JA = 130C/ W (N8) TJMAX = 125C, JA = 150C/ W (S8)
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
SYMBOL VOD1 VOD2 VOD VOC VOC VIH VIL IIN1 IIN2 VTH VTH VOH VOL IOZR RIN ICC ISHDN IOSD1 IOSD2 IOSR PARAMETER Differential Driver Output Voltage (Unloaded) Differential Driver Output Voltage (with Load) Change in Magnitude of Driver Differential Output Voltage for Complementary Output States Driver Common Mode Output Voltage Change in Magnitude of Driver Common Mode Output Voltage for Complementary Output States Input High Voltage Input Low Voltage Input Current Input Current (A, B) Differential Input Threshold Voltage for Receiver Receiver Input Hysteresis Receiver Output High Voltage Receiver Output Low Voltage Three-State (High Impedance) Output Current at Receiver Receiver Input Resistance Supply Current Supply Current in Shutdown Mode Driver Short-Circuit Current, VOUT = HIGH Driver Short-Circuit Current, VOUT = LOW Receiver Short-Circuit Current
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VCC = 5V (Notes 2, 3) unless otherwise noted.
CONDITIONS IO = 0 R = 50 (RS422) R = 27 (RS485), Figure 1 R = 27 or R = 50, Figure 1 R = 27 or R = 50, Figure 1 R = 27 or R = 50, Figure 1 DE, DI, RE DE, DI, RE DE, DI, RE DE = 0, VCC = 0V or 5.25V, VIN = 12V DE = 0, VCC = 0V or 5.25V, VIN = - 7V - 7V VCM 12V VCM = 0V IO = - 4mA, VID = 200mV IO = 4mA, VID = - 200mV VCC = Max, 0.4V VO 2.4V - 7V VCM 12V No Load, Output Enabled No Load, Output Disabled DE = 0, RE = VCC - 7V VO 12V - 7V VO 12V 0V VO VCC
q q q q q q q q q q q q q q q q q q q q q q
MIN 2.0 1.5
TYP
MAX 5 5 0.2 3 0.2
UNITS V V V V V V V
2 0.8 2 1.0 - 0.8 - 0.2 45 3.5 0.4 1 12 300 80 1 35 35 7 500 120 10 250 250 85 0.2
2
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V A mA mA V mV V V A k A A A mA mA mA
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LTC1481
SWITCHI G CHARACTERISTICS
SYMBOL tPLH tPHL tSKEW tr, tf tZH tZL tLZ tHZ tPLH tPHL tSKD tZL tZH tLZ tHZ fMAX tSHDN tZH(SHDN) tZL(SHDN) tZH(SHDN) tZL(SHDN) PARAMETER Driver Input to Output Driver Input to Output Driver Output to Output Driver Rise or Fall Time Driver Enable to Output High Driver Enable to Output Low Driver Disable Time from Low Driver Disable Time from High Receiver Input to Output Receiver Input to Output
tPLH - tPHL Differential Receiver Skew
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VCC = 5V (Notes 2, 3) unless otherwise noted.
CONDITIONS RDIFF = 54, CL1 = CL2 = 100pF, (Figures 3, 5)
q q q q
Receiver Enable to Output Low Receiver Enable to Output High Receiver Disable from Low Receiver Disable from High Maximum Data Rate Time to Shutdown Driver Enable from Shutdown to Output High Driver Enable from Shutdown to Output Low Receiver Enable from Shutdown to Output High Receiver Enable from Shutdown to Output Low
Note 1: Absolute Maximum Ratings are those values beyond which the life of the device may be impaired. Note 2: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise specified.
TYPICAL PERFOR A CE CHARACTERISTICS
Driver Differential Output Voltage vs Output Current
70 60
DIFFERENTIAL VOLTAGE (V)
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
50 40 30 20 10 0 0 1 4 3 OUTPUT VOLTAGE (V) 2 5
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MIN 10 10 3
TYP 30 30 5 15 40 40 40 40
MAX 60 60 10 40 70 70 70 70 200 200 50 50 50 50 600 100 100 3500 3500
UNITS ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Mbits/s ns ns ns ns ns
CL = 100pF (Figures 4, 6), S2 Closed CL = 100pF (Figures 4, 6), S1 Closed CL = 15pF (Figures 4, 6), S1 Closed CL = 15pF (Figures 4, 6), S2 Closed RDIFF = 54, CL1 = CL2 = 100pF, (Figures 3, 7) CRL = 15pF (Figures 2, 8), S1 Closed CRL = 15pF (Figures 2, 8), S2 Closed CRL = 15pF (Figures 2, 8), S1 Closed CRL = 15pF (Figures 2, 8), S2 Closed DE = 0, RE = CL = 100pF (Figures 4, 6), S2 Closed CL = 100pF (Figures 4, 6), S1 Closed CL = 15pF (Figures 2, 8), S2 Closed CL = 15pF (Figures 2, 8), S1 Closed
q q q q q q q q q q q q q q q q q
30 30
140 140 13 20 20 20 20
2.5 50 200 40 40
Note 3: All typicals are given for VCC = 5V and TA = 25C.
Driver Differential Output Voltage vs Temperature
2.5 2.4 2.3 2.2 2.1 2.0 1.9 1.8 1.7 1.6 1.5 -50 -25 50 0 75 25 TEMPERATURE (C) 100 125
10 0
Driver Output Low Voltage vs Output Current
70 60 50 40 30 20 TA = 25C
TA = 25C
RL = 54
0
1
2 OUTPUT VOLTAGE (V)
3
4
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1481 G02
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LTC1481 TYPICAL PERFOR A CE CHARACTERISTICS
Driver Output High Voltage vs Output Current
0 -10
OUTPUT CURRENT (mA)
TA = 25C
-20 -30
TIME (ns)
-40 -50 -60
8 6 4
TIME (ns)
-70 -80 -90 0 1 2 3 OUTPUT VOLTAGE (V) 4 5
1481 G04
PI FU CTIO S
RO (Pin 1): Receiver Output. If the receiver output is enabled (RE low), then if A > B by 200mV, RO will be high. If A < B by 200mV, then RO will be low. RE (Pin 2): Receiver Output Enable. A low enables the receiver output, RO. A high input forces the receiver output into a high impedance state. DE (Pin 3): Driver Outputs Enable. A high on DE enables the driver output. A, B and the chip will function as a line driver. A low input will force the driver outputs into a high impedance state and the chip will function as a line receiver. If RE is high and DE is low, the part will enter a low power (1A) shutdown state. DI (Pin 4): Driver Input. If the driver outputs are enabled (DE high) then a low on DI forces the outputs A low and B high. A high on DI with the driver outputs enabled will force A high and B low. GND (Pin 5): Ground. A (Pin 6): Driver Output/Receiver Input. B (Pin 7): Driver Output/Receiver Input. VCC (Pin 8): Positive Supply. 4.75V < VCC < 5.25V.
FU CTIO TABLES
LTC1481 Transmitting
INPUTS RE X X 0 1 DE 1 1 0 0 DI 1 0 X X 0 1 Z Z* OUTPUTS B A 1 0 Z Z* RE 0 0 0 1
*Shutdown mode for LTC1481
4
UW
Receiver tPLH - tPHL vs Temperature
14 12 10
3.0 2.5 2.0 1.5 1.0 0.5
Driver Skew vs Temperature
2 0 -50 -25
50 25 75 0 TEMPERATURE (C)
100
125
0 -50 -25
50 25 75 0 TEMPERATURE (C)
100
125
1481 G05
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LTC1481 Receiving
INPUTS DE 0 0 0 0 A-B 0.2V - 0.2V Inputs Open X OUTPUTS RO 1 0 1 Z*
*Shutdown mode for LTC1481
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LTC1481
TEST CIRCUITS
A R VOD R B
LTC1481 * F01
RECEIVER OUTPUT
VOC
TEST POINT
S1
1k VCC
CRL
1k
S2
LTC1481 * F02
Figure 1. Driver DC Test Load
3V DE A DI B RDIFF CL2 CL1 A RO B RE
LTC1481 * F03
Figure 2. Receiver Timing Test Load
S1 OUTPUT UNDER TEST 500 S2 CL
LTC1481 * F04
VCC
15pF
Figure 3. Driver/Receiver Timing Test Circuit
Figure 4. Driver Timing Test Load
SWITCHI G TI E WAVEFOR S
3V DI 0V t PLH B VO A VO 0V -VO 1/2 VO 10% tr tSKEW 90% VDIFF = V(A) - V(B) tf t SKEW 90% 10%
LTC1481 * F05
1.5V
Figure 5. Driver Propagation Delays
3V DE 0V 5V A, B VOL VOH A, B 0V 2.3V 1.5V
Figure 6. Driver Enable and Disable Times
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f = 1MHz, tr 10ns, tf 10ns t PHL
1.5V 1/2 VO
f = 1MHz, tr 10ns, tf 10ns t ZL(SHDN), t ZL t LZ
1.5V
2.3V
OUTPUT NORMALLY LOW
0.5V
OUTPUT NORMALLY HIGH t HZ
0.5V
LTC1481 * F06
t ZH(SHDN), t ZH
5
LTC1481
SWITCHI G TI E WAVEFOR S
VOH RO VOL t PHL VOD2 A-B -VOD2 0V 1.5V OUTPUT f = 1MHz, tr 10ns, tf 10ns INPUT t PLH 0V
LTC1481 * F07
Figure 7. Receiver Propagation Delays
3V RE 0V 5V RO 1.5V f = 1MHz, tr 10ns, tf 10ns t ZL(SHDN), tZL 1.5V OUTPUT NORMALLY LOW t LZ 0.5V 1.5V
RO 0V
Figure 8. Receiver Enable and Disable Times
APPLICATIO S I FOR ATIO
Basic Theory of Operation
Traditionally, RS485 transceivers have been designed using bipolar technology because the common mode range of the device must extend beyond the supplies and the device must be immune to ESD damage and latch-up. Unfortunately, most bipolar devices draw a large amount of supply current, which is unacceptable for the numerous applications that require low power consumption. The LTC1481 is a CMOS RS485/RS422 transceiver which features ultralow power consumption without sacrificing ESD and latch-up immunity. The LTC1481 uses a proprietary driver output stage, which allows a common mode range that extends beyond the power supplies while virtually eliminating latch-up and providing excellent ESD protection. Figure 9 shows the LTC1481 output stage while Figure 10 shows a conventional CMOS output stage. When the conventional CMOS output stage of Figure 10 enters a high impedance state, both the P-channel (P1) and the N-channel (N1) are turned off. If the output is then driven above VCC or below ground, the P+/N -well diode
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1.5V
1.5V
OUTPUT NORMALLY HIGH t HZ
0.5V
LTC1481 * F08
t ZH(SHDN), tZH
(D1) or the N+/P-substrate diode (D2) respectively will turn on and clamp the output to the supply. Thus, the output stage is no longer in a high impedance state and is not able to meet the RS485 common mode range requirement. In addition, the large amount of current flowing through either diode will induce the well-known CMOS latch-up condition, which could destroy the device. The LTC1481 output stage of Figure 9 eliminates these problems by adding two Schottky diodes, SD3 and SD4. The Schottky diodes are fabricated by a proprietary modification to the standard N-well CMOS process. When the output stage is operating normally, the Schottky diodes are forward biased and have a small voltage drop across them. When the output is in the high impedance state and is driven above VCC or below ground, the parasitic diode D1 or D2 still turns on, but SD3 or SD4 will reverse bias and prevent current from flowing into the N-well or the substrate. Thus the high impedance state is maintained even with the output voltage beyond the supplies. With no minority carrier current flowing into the N-well or substrate, latch-up is virtually eliminated under power-up or power-down conditions.
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LTC1481
APPLICATIO S I FOR ATIO
VCC SD3 P1
D1
OUTPUT LOGIC SD4 ESD
N1
D2
LTC1481 * F09
Figure 9. LTC1481 Output Stage
VCC P1
D1
LOGIC
OUTPUT
N1
D2
LTC1481 * F10
Figure 10. Conventional CMOS Output Stage
The LTC1481 output stage will maintain a high impedance state until the breakdown of the N-channel or P-channel is reached when going positive or negative respectively. The output will be clamped to either VCC or ground by a Zener voltage plus a Schottky diode drop, but this voltage is well beyond the RS485 operating range. Because the ESD injected current in the N-well or substrate consists of majority carriers, latch-up is prevented by careful layout techniques. An ESD cell protects output against multiple 10kV human body model ESD strikes.
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of circuits as described herein will not infringe on existing patent rights.
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Low Power Operation The LTC1481 is designed to operate with a quiescent current of 120A max. With the driver in three-state, ICC will drop to this 120A level. With the driver enabled there will be additional current drawn by the internal 12k resistor. Under normal operating conditions this additional current is overshadowed by the current drawn by the external bus impedance. Shutdown Mode Both the receiver output (RO) and the driver outputs (A, B) can be placed in three-state mode by bringing RE high and DE low respectively. In addition, the LTC1481 will enter shutdown mode when RE is high and DE is low. In shutdown the LTC1481 typically draws only 1A of supply current. In order to guarantee that the part goes into shutdown, DE must be low and RE must be high for at least 600ns simultaneously. If this time duration is less than 50ns the part will not enter shutdown mode. Toggling either RE or DE will wake the LTC1481 back up within 3.5s. Propagation Delay Many digital encoding schemes are dependent upon the difference in the propagation delay times of the driver and receiver. Figure 11 shows the test circuit for the LTC1481 propagation delay. The receiver delay times are: tPLH - tPHL = 13ns Typ, VCC = 5V The drivers skew times are: Skew = 5ns Typ, VCC = 5V 10ns Max, VCC = 5V, TA = - 40C to 85C
100pF TTL IN t r, t f < 6ns D R 54 100pF R RECEIVER OUT
LTC1481 * F11
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Figure 11. Receiver Propagation Delay Test Circuit
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LTC1481
PACKAGE DESCRIPTIO
.300 - .325 (7.620 - 8.255)
.008 - .015 (0.203 - 0.381)
.065 (1.651) TYP .120 (3.048) .020 MIN (0.508) MIN .018 .003 (0.457 0.076)
(
+.035 .325 -.015 +0.889 8.255 -0.381
)
INCHES MILLIMETERS *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
NOTE: 1. DIMENSIONS ARE
.010 - .020 x 45 (0.254 - 0.508) .008 - .010 (0.203 - 0.254)
.053 - .069 (1.346 - 1.752) 0- 8 TYP
.016 - .050 (0.406 - 1.270) NOTE: 1. DIMENSIONS IN
INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
.014 - .019 (0.355 - 0.483) TYP
RELATED PARTS
PART NUMBER LTC486 LTC488 LTC490 LTC1485 DESCRIPTION Quad RS485 Driver Quad RS485 Receiver Full Duplex RS485 Transceiver Differential Bus Transceiver COMMENTS Fits 75172 Pinout, Only 110A IQ Fits 75173 Pinout, Only 7A IQ Fits 75179 Pinout, Only 300A IQ Fits 75176A Pinout, Only 1.7mA IQ
8
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 q FAX: (408) 434-0507
q
U
N8 Package 8-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
.130 .005 (3.302 0.127) .400* (10.160) MAX 8 7 6 5 .045 - .065 (1.143 - 1.651) .255 .015* (6.477 0.381) 1 2 3 4
N8 1002
.100 (2.54) BSC
S8 Package 8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.189 - .197 (4.801 - 5.004) NOTE 3 .004 - .010 (0.101 - 0.254) 8 7 6 5 .045 .005 .050 BSC N .150 - .157 (3.810 - 3.988) NOTE 3 N/2
SO8 0502
N .228 - .244 (5.791 - 6.197) .245 MIN
.050 (1.270) BSC
.160 .005
1 .030 .005 TYP
2
3
N/2
1
2
3
4
RECOMMENDED SOLDER PAD LAYOUT
1481fa LT/TP 0303 1K REV A * PRINTED IN USA
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 1994

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